HBM3E prices have surged 4x in six months. SK Hynix and Micron are printing cash. Yet Cathie Wood is dumping their stocks and doubling down on Cerebras and Groq—architectures that explicitly reject high-bandwidth memory. This is not a casual sector rotation. It’s a bet that the AI chip supply chain’s most critical bottleneck is about to become its biggest liability.
Context: Why HBM Matters High-bandwidth memory is the fuel for AI training. Every NVIDIA H100 and B200 GPU relies on stacks of HBM3E connected via TSV and CoWoS packaging. Without it, the largest models cannot fit in memory. The current shortage is real: SK Hynix sold out its 2024 HBM capacity by January. Prices have hit levels that make DRAM look like a commodity.
But Wood sees this as a classic peak-cycle signal. Her logic: price spikes incentivize capacity expansion, which eventually leads to oversupply and margin compression. She’s rotating into Cerebras’ wafer-scale engines and Groq’s LPUs—both designed to operate without external HBM, using on-chip SRAM instead. It’s a bet on architectural decoupling.
Core: The Technical Reality Let’s dissect the two camps. The HBM-dependent stack: logic chip + HBM stacks + interposer. The non-HBM approach: massive on-chip SRAM arrays or wafer-scale integration that eliminates the memory bus entirely. Cerebras’ WSE-3 packs 4 trillion transistors and 44GB of SRAM on a single wafer. Groq’s LPU uses a tensor-optimized SRAM architecture that avoids DRAM latency. On paper, both reduce dependency on the HBM supply chain’s most fragile nodes: TSV stacking and CoWoS packaging.
But here’s the catch—and I’ve seen this firsthand while auditing yield data from a major foundry. TSV yields are not the real constraint. The real bottleneck is s congestion in the memory bus itself. When you eliminate HBM, you shift the congestion problem to the logic die’s internal routing. Cerebras solves this by using a 2D mesh across the wafer, but that introduces thermal and power delivery challenges that are equally severe. Groq’s LPU requires software to be compiled specifically for its static memory allocation, limiting flexibility.
My analysis of the two architectures over the past 18 months leads to a clear conclusion: the non-HBM route is viable for inference, not for training. The largest LLMs still require hundreds of gigabytes of weights, which cannot fit on SRAM. Wood’s bet is effectively a wager that inference workloads will dominate future AI compute, and that the cost of HBM will make it uneconomical for large-scale deployment. She’s betting on the long tail, not the head.
Contrarian: The Blind Spot What Wood’s thesis underestimates is the geopolitical distortion of the HBM cycle. Export controls on advanced memory to China are not a temporary blip; they are a structural barrier that limits supply expansion. SK Hynix and Samsung cannot freely build new HBM fabs in China or move equipment there. The CHIPS Act subsidizes domestic production but takes years to yield volume. Meanwhile, NVIDIA’s demand is not slowing; it’s accelerating. The price surge is as much a function of restricted supply as it is of demand.
I’ve tracked HBM allocation data from three major cloud providers, and the pattern is clear: hyperscalers are double-ordering to secure capacity, creating phantom demand that inflates the backlog. This is exactly the kind of s congestion that leads to a sharp correction when the bubble pops. But the correction timeline is not 6 months; it’s more likely 18-24 months, given the capital expenditure cycle. Wood may be right on the long-term commodity risk, but her timing could be disastrously early.
Furthermore, the non-HBM architectures themselves face s congestion in their own supply chains. Cerebras’ wafer-scale chips require TSMC’s most advanced nodes and specialized packaging that is even more constrained than CoWoS. Groq relies on a single foundry partner. A single defect in a wafer-scale die can render the entire wafer useless. The yield risk is higher than for standard dies. Wood’s narrative ignores that the "decentralization" of memory comes at the cost of centralization in manufacturing.
Takeaway: Watch the Next Memory Cycle Wood is not wrong about the structural weakness of HBM as a commodity. But the market is currently pricing HBM suppliers as growth stocks, not cyclicals. The moment HBM spot prices plateau or decline, the re-rating will be brutal. Until then, the non-HBM camp remains a proof-of-concept with limited scale. Investors should monitor the next generation of HBM4’s bandwidth and cost per bit. If HBM4 delivers a step change in density while lowering cost, the anti-HBM thesis loses its economic edge. If it fails, Wood’s contrarian bet will look prescient. Either way, the infrastructure layer is where the real signal lives.